Recently active-matrix organic light-emitting diode (AMOLED) displays with amorphous silicon (a-Si), poly-silicon, organic, or other driving backplane have become more attractive due to advantages over active matrix liquid crystal displays. An AMOLED display using a-Si backplanes, for example, has the advantages that include low temperature fabrication that broadens the use of different substrates and makes flexible displays feasible, and its low cost fabrication. Also, OLED yields high resolution displays with a wide viewing angle.
The AMOLED display includes an array of rows and columns of pixels, each having an organic light-emitting diode (OLED) and backplane electronics arranged in the array of rows and columns. Since the OLED is a current driven device, the pixel circuit of the AMOLED should be capable of providing an accurate and constant drive current.
FIG. 1 illustrates conventional operation cycles for a conventional voltage-programmed AMOLED display. In FIG. 1, “Rowi” (i=1, 2, 3) represents a ith row of the matrix pixel array of the AMOLED display. In FIG. 1, “C” represents a compensation voltage generation cycle in which a compensation voltage is developed across the gate-source terminal of a drive transistor of the pixel circuit, “VT-GEN” represents a VT-generation cycle in which the threshold voltage of the drive transistor, VT, is generated, “P” represents a current-regulation cycle where the pixel current is regulated by applying a programming voltage to the gate of the drive transistor, and “D” represents a driving cycle in which the OLED of the pixel circuit is driven by current controlled by the drive transistor.
For each row of the AMOLED display, the operating cycles include the compensation voltage generation cycle “C”, the VT-generation cycle “VT-GEN”, the current-regulation cycle “P”, and the driving cycle “D”. Typically, these operating cycles are performed sequentially for a matrix structure, as shown in FIG. 1. For example, the entire programming cycles (i.e., “C”, “VT-GEN”, and “P”) of the first row (i.e., Row1) are executed, and then the second row (i.e., Row2) is programmed.
However, since the VT-generation cycle “VT-GEN” requires a large timing budget to generate an accurate threshold voltage of a drive TFT, this timing schedule cannot be adopted in large-area displays. Moreover, executing two extra operating cycles (i.e., “C” and “VT-GEN”) results in higher power consumption and also requires extra controlling signals leading to higher implementation cost.